The present invention relates to a so-called ion implantation separation method in which a wafer to which hydrogen or rare gas ions are implanted, is separated after heat treatment to manufacture a bonded wafer, more specifically, to a method for manufacturing a bonded SOI wafer which causes, on the bonding surface, less bonding failure called a void.
As a method for manufacturing a bonded SOI (Silicon On Insulator) wafer using a bonding method, there has conventionally been known a technique for bonding two silicon wafers together via a silicon oxide film, for example, as disclosed in Japanese Patent Publication No. Hei 5-46086, a method in which an oxide film is formed on at least one of the two wafers, the wafers are closely contact with each other so as not to contain any foreign matters between the surfaces to be bonded, and they are subjected to a heat treatment at a temperature of 200 to 1200xc2x0 C. to enhance the bonding strength.
The bonded wafer whose bonding strength is enhanced by performing heat treatment can be subjected to later grinding and polishing processes. The thickness of the element fabrication side wafer is reduced to a predetermined thickness by grinding and polishing to form an SOI layer for element forming.
A bonded SOI wafer produced as described above has advantages of excellent crystallinity of the SOI layer and high reliability of the produced buried oxide layer existing immediately below the SOI layer. However, because a thin film should be formed by grinding and polishing, the operation for producing the thin film takes time, and there are generated material loss. In addition, the uniformity of the film thickness obtained by this method is only in a level of the desired film thickness xc2x10.3 xcexcm.
In recent years, with high-integration and high-speed of semiconductor devices, the thickness of the SOI layer must be made smaller and improve the film thickness uniformity. Specifically, the film thickness and the film thickness uniformity of about 0.1xc2x10.01 xcexcm are required.
In order that the thin film SOI wafer having such a film thickness and film thickness uniformity is realized by a bonded wafer, a process for reducing the thickness using conventional grinding and polishing is impossible. As a new thin-film technique, there is developed an ion implantation separation method disclosed in Japanese Laid-Open Patent Publication No. Hei 5-211128 or a method called a hydrogen ion separation method (also called a Smart Cut (trademark) method).
This hydrogen ion separation method is a technique that comprises forming an oxide film on at least one of two silicon wafers, implanting at least one of hydrogen ions or rare gas ions into one of the silicon wafers from its upper surface to form a fine bubble layer (enclosed layer) inside the silicon wafer, bringing the ion implanted surface into contact with the other wafer via the oxide film, then subjecting the wafers to a heat treatment (separation heat treatment) to separate one of the wafer as a thin film at the fine bubble layer as a cleavage plane (separating plane), and further subjecting them to a heat treatment (bonding heat treatment) for firmly bonding them to obtain an SOI wafer.
There has recently been also known a method for manufacturing an SOI wafer in which hydrogen ions are excited to perform ion implantation in a plasma state for separation at room temperature without adding a special heat treatment.
In this method, the cleavage plane is a good mirror surface, and an SOI wafer having an extremely high uniformity of the SOI layer can be obtained relatively easily. The thin-film wafer separated can also be reused, so that the material can be used effectively.
Further, in this method, silicon wafers can be directly bonded together without interposing an oxide film. This method is used not only in the case of bonding the silicon wafers together, but also in the case of implanting ions to a silicon wafer to be bonded to an insulator wafer such as quartz, silicon carbide, and alumina having different thermal expansion coefficients, or in the case of implanting ions to an insulator wafer to be bonded to other wafer, thereby manufacturing a wafer having these thin films.
When manufacturing a bonded wafer using the ion implantation separation method, organic substances or particles attached in the ion implantation step cause, in the bonding interface, bonding failure called a void. Usually, a wafer to which ions are implanted is subjected to RCA cleaning or organic-substance removing and cleaning, and then, is bonded to the other wafer. The RCA cleaning is a typical cleaning method in the semiconductor process, based on two kinds of cleaning solutions of SC-1 (NH4OH/H2O2/H2O mixture) and SC-2 (HCl/H2O2/H2O mixture), and can remove impurities such as particles, organic substances, or metal contaminants.
When a wafer to which ions are implanted is cleaned using the conventional cleaning method as described above to manufacture a bonded wafer, the void generation rate cannot be always reduced to a level satisfied. In particular, when no voids are observed immediately after bonding or after separation heat treatment, voids of small size (below 1 mm) observed after bonding heat treatment or a step called touch polish for slightly polishing the separated surface after bonding heat treatment may be generated. The reduction thereof has been required.
The present inventors have examined in detail a void generated through the usual cleaning step as described above. Consequently, it is apparent that a void tends to generate in the case that impurities such as particles or organic substances attached in the ion implantation step remain without being removed by the conventional chemical cleaning or the wafer surface becomes rough by ion implantation. To remove any impurities such as remaining particles or surface roughness, the present invention has been completed by conceiving use of a physical removing method.
As s specific method for physically removing impurities, for example, CMP can be used. The CMP polishing physically scrapes impurities such as particles or organic substances present on the surface to which ions are implanted and cannot be removed by chemical cleaning, and can improve surface roughness caused in the ion implantation step, thereby removing of void generation.
xe2x80x9cCMPxe2x80x9d in the present invention will be defined herein.
One of recent device process techniques emphasized is a technique called CMP (Chemical and Mechanical Polishing). A CMP technique in a broad meaning is not a new technique and has been long used in mirror polishing for silicon wafers as typical chemical and mechanical polishing. On the other hand, CMP in a narrow meaning which has been focused on recently is one kind of a flattening technique in device process, and is typically a technique composed mainly of a physical flattening technique for flattening an interlayer insulator film such as oxide film or a metal film such as wiring. When CMP is simply described in the present invention, it will represent the CMP in a narrow meaning.